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International Journal of Information Technology and Computer Science(IJITCS)

International Journal of Information Technology and Computer Science(IJITCS)

ISSN: 2074-9007 (Print), ISSN: 2074-9015 (Online)

Publisher: MECS
  • IJITCS Vol.3, No.3, June 2011

FPGA Based High Accuracy Synchronous Acquisition Design for Binocular Vision System

 
Full Text (PDF, 232KB), PP.22-28  
Author(s)  
Lili Lin,Wenhui Zhou  
Index Terms  
Binocular Stereo Vision, Synchronous Acquisition, Ping-pong Buffer, FPGA  
Abstract  
This paper proposes a coarse-to-fine two-level synchronous data acquisition and transmission system for binocular stereo vision, which satisfies strict synchronous requirement of stereo vision. Specifically, this synchronization system design contains: coarse level synchronous based on hardware circuit design and the fine level synchronous based on hardware description language (HDL) design. The former includes the synchronization design of clock and external trigger. The latter utilizes a multi-level synchronous control strategy from field-level to pixel-level, which consists of field-synchronous acquisition of the two-channel video inputs, two-channel Ping-pong buffers switch control module, and pixel-synchronous bit-splicing and PCI transmission module. The experiments of synchronous acquisition and display demonstrate the high reliability and great performance of this synchronous system.
 
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Citation  
Lili Lin,Wenhui Zhou,"FPGA Based High Accuracy Synchronous Acquisition Design for Binocular Vision System", IJITCS, vol.3, no.3, pp.22-28, 2011.