This paper proposes a broadband wireless transceiver which can be reconfigured to any type of cyclic-prefix (CP) -based communication systems, including orthogonal frequency-division multiplexing (OFDM), single-carrier cyclic-prefix (SCCP) system, multicarrier (MC) code-division multiple access (MC-CDMA), MC direct-sequence CDMA (MC-DS-CDMA), CP-based CDMA (CP-CDMA), and CP-based direct-sequence CDMA (CP-DS-CDMA). A hardware platform is proposed and the reusable common blocks in such a transceiver are identified. The emphasis is on the equalizer design for mobile receivers. It is found that after block despreading operation, MC-DS-CDMA and CP-DS-CDMA have the same equalization blocks as OFDM and SCCP systems, respectively, therefore hardware and software sharing is possible for these systems. An attempt has also been made to map the functional reconfigurable transceiver onto the proposed hardware platform. The different functional entities which will be required to perform the reconfiguration and realize the transceiver are explained.
This article is part of the series Reconfigurable Radio for Future Generation Wireless Systems.
Research Article Reconfigurable Signal Processing and Hardware Architecture for Broadband Wireless Communications
Institute for InfoComm Research (I2R), 21 Heng Mui Keng Terrace, 119613, Singapore
EURASIP Journal on Wireless Communications and Networking 2005, 2005:871962 doi:10.1155/WCN.2005.323
The electronic version of this article is the complete one and can be found online at: http://jwcn.eurasipjournals.com/content/2005/3/871962
| Received: | 1 October 2004 |
| Revisions received: | 22 April 2005 |
| Published: | 1 August 2005 |
© 2005 Liang et al.
This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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